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Starling Bank is exploring plans to buy another UK lender, an overhaul to its business model that would allow the digital bank to put its £12bn worth of customer deposits to more profitable use. 

The fintech is actively looking at several acquisition options that would allow it to expand its lending capacity and deploy deposits into areas that could generate higher returns, such as corporate lending, according to two people familiar with the discussions. One said the acquisition could be “substantial” in scale.  

The acquisition is part of an effort by the fintech to diversify its income. Currently, Starling customer deposits are either held at the Bank of England collecting interest, invested in securities such as bonds, or channelled into mortgage lending through Fleet, a small lender that Starling bought in 2021.

John Cronin, an independent bank analyst, said Starling “has struggled to grow its loan book commensurate with the size of its deposit book”. He said Starling’s latest set of accounts showed that £4.7bn worth of its £12.1bn deposits were net loans, which was lower than peers.

Starling has thought about growing its capacity organically but has decided that an acquisition would be faster, according to the people familiar with the situation.

Starling declined to comment. 

The neobank, which was founded in 2014 by former Allied Irish Banks executive Anne Boden, has been tied to an acquisition before. In April, Sky News reported that Shawbrook, the SME lender, had approached Starling about a potential combination, but no deal emerged. 

One person familiar with the business said Starling was not eyeing up mergers but acquisitions of a mixture of cash or cash and shares.

Starling was previously criticised by the government’s former anti-fraud minister, Lord Theodore Agnew, for expanding its lending during Covid-19. The neobank built out a large portfolio of loans from the government-backed “bounce back loans”, which were issued by banks to support struggling businesses quickly during the pandemic.

This grew to become a significant chunk of Starling’s lending book, but it announced in May that it was setting aside £28mn to cover loans that may not have complied with the lending scheme’s requirements. The UK financial regulator fined Starling in 2024 for “shockingly lax controls” against financial crime during its expansion from 2017 to 2023. The bank said it had since invested heavily in strengthening its controls.

Starling has also built software called Engine, which allows lenders to design and build their own digital capabilities. The software, which Starling believes will be key to growth, is already being used by a bank in Australia and another in Romania. Last month, Starling announced that it had signed Canada’s Tangerine Bank as its latest Engine customer. 

Starling is also weighing up buying a bank in the US to accelerate its global expansion, the Financial Times has previously reported. The plans could also include a US initial public offering. Part of the ambition is to plug Engine into an American bank and attract more local customers.

Raman Bhatia, the group’s chief executive officer, told the FT’s Global Banking Summit last week that Starling was also open to buying a European business in the next three to five years to further boost expansion.

Starling acquired in August the accounting software start-up Ember, which it hopes to provide to its small-business customers. “We have focused on high-quality acquisitions but now we want to turbocharge that engine in the UK so there is so much to do here in terms of market share and growth expansion,” said Bhatia at the FT’s banking summit.

In this new policy brief, UNEP FI and the European Banking Federation (EBF) share seven potential policy levers to help strengthen the investment case for the EU chemical sector and help it attract finance for its sustainable transition.

The brief discusses the sector’s market and decarbonization challenges and how new policy packages anchored in the European Green Deal—including the 2025 EU Chemicals Industry Package and the 2025 Clean Industrial Deal (CID), supported by the Industrial Decarbonization Bank—present opportunities by aiming to create the policy certainty and financing tools needed for large-scale sectoral transformation.

This is the first in a new EU sectoral policy brief series developed by UNEP FI and EBF, intended to strengthen the connection between financial institutions, policymakers, and the real economy.

Taiwan has begun trade secrets investigations in its critical chipmaking sector under newly broadened national security laws, but the probes have raised eyebrows for who they are targeting: not companies from China but from the island nation’s closest allies.

Last week, prosecutors charged the local subsidiary of Japanese chip equipment maker Tokyo Electron with failing to prevent alleged theft of trade secrets from Taiwan Semiconductor Manufacturing Company.

A week earlier, prosecutors raided two homes of former TSMC executive Lo Wei-jen, who joined Intel after he left the Taiwanese company in July, as part of a probe into whether the 75-year-old was sharing “national core critical technology” with his new employer.

The probe came after TSMC sued Lo for violating his non-compete agreement, saying it was highly probable he “uses, leaks, discloses, delivers or transfers TSMC’s trade secrets and confidential information to Intel”.

Legal and industry experts in Taiwan said they were glad to finally see investigators getting serious about protecting a technology that had made Taiwan indispensable to the global economy. TSMC is the world’s largest chipmaker and dominates the market for cutting-edge semiconductors.

But, unexpectedly, the first trade secrets cases under national security laws are not implicating companies from China — long seen as the main culprit in technology theft and the biggest threat to Taiwan’s security — but Tokyo Electron, a supplier, and Intel, a customer and rival. Both companies are from countries viewed as Taiwan’s closest partners.

The cases have emerged amid concern in Taipei over the reliability of its main security backer given US President Donald Trump’s desire to make a “deal” with China, as well as his remarks about Taiwan “stealing” America’s chip business and allegedly freeriding on defence support.

An executive at a Taiwanese chip company in the US likened the investigations to a “man bites dog” scenario, saying the probes went against both the narrative that Beijing was poaching Taiwanese talent and Trump’s position that Taiwan had stolen the US’s technological leadership.

A US executive at a fund invested in semiconductor companies warned that Taipei’s more aggressive protection of its economic security could create risks for its geopolitical security by offending the US.

“This is not a good look for Taiwan right now,” said the executive. “Do they really think they can afford to go after US efforts to revive its chip manufacturing industry?”

Under pressure from the Trump administration, TSMC raised its US investment commitment by $100bn to $165bn in March. But Washington has made clear this is not enough. Trump administration officials have said they want 50 per cent of chip manufacturing to happen onshore, far more than TSMC’s expanded capacity can deliver.

In August, Washington agreed to take a 10 per cent stake in Intel as it aimed to resurrect the struggling company as a national champion of semiconductor manufacturing.

Neither TSMC nor the prosecution has targeted Intel directly or suggested its involvement in alleged technology theft. Prosecutors are only investigating Lo and have not brought charges against him. But observers suggested Washington could apply political leverage on any Taiwanese legal case.

“Taiwan has very limited options to refuse US requests and pressure” because it was pursuing a trade deal to lower Washington’s 20 per cent tariff on Taiwanese exports, said James Chen, a professor at Tamkang University in Taipei. It is also seeking US support for President Lai Ching-te’s tough approach towards China.

Provisions introduced in 2022 made the unauthorised transfer of “national core critical technology” to a foreign entity a national security offence for the first time, with a clear focus on China, to which Taiwan has been losing chip engineers for years.

In one of the most prominent controversies, Liang Mong-song, a former TSMC research and development executive, joined Semiconductor Manufacturing International Company, China’s largest chipmaker, in 2017 and is now its co-chief executive. He and the many TSMC engineers who followed him are credited with helping SMIC narrow its technology gap with the Taiwanese chipmaker.

The national security law amendments have raised the risk of such moves and stipulate much higher fines for leaking trade secrets to China than to allies such as Japan and the US.

But experts said the law still fell short. Tsai Ing-wen, Lai’s predecessor, initially aimed for a government role in initiating trade secrets cases through broad national security powers. The law adopted by parliament only allows prosecutors to move when a Taiwanese company makes a complaint, mirroring the US Economic Espionage Act and similar laws in Japan.

Investigators are now under pressure to build solid cases. In the instance of Tokyo Electron’s subsidiary, prosecutors have charged former TSMC staff with technology theft, but the indictment of the company only lists a failure to prevent such behaviour, not an accusation of theft itself.

“They have established the precedent that companies are responsible for building strong internal compliance mechanisms to protect against trade secrets theft,” said Jeremy Chang, chief executive of the Research Institute for Democracy, Society and Emerging Technology under Taiwan’s technology ministry.

“That could become a key task for everyone in the semiconductor supply chain,” he said, especially as more countries try to onshore chip manufacturing.

The former TSMC staff who have been charged declined to comment.

Tokyo Electron said the indictment of its subsidiary did not allege it had directed or encouraged its employee to improperly obtain TSMC technology. The company added that it had measures in place to prevent such behaviour and would strengthen its compliance systems.

Lo declined to comment. Intel stressed its commitment to internal controls that prohibit the use of third-party technology and said it had no reason to believe there was merit to the allegations involving Lo.

Observers cautioned that as Taipei worries about securing continued support from Washington, politics might play into prosecutors’ decisions.

“The government might have some thoughts of intervening or using leverage, but they cannot directly intervene in the judicial system,” said Chen. “This is a very politicised and sensitive issue.”

MIT researchers have developed a new fabrication method that could enable the production of more energy efficient electronics by stacking multiple functional components on top of one existing circuit.

In traditional circuits, logic devices that perform computation, like transistors, and memory devices that store data are built as separate components, forcing data to travel back and forth between them, which wastes energy.

This new electronics integration platform allows scientists to fabricate transistors and memory devices in one compact stack on a semiconductor chip. This eliminates much of that wasted energy while boosting the speed of computation.

Key to this advance is a newly developed material with unique properties and a more precise fabrication approach that reduces the number of defects in the material. This allows the researchers to make extremely tiny transistors with built-in memory that can perform faster than state-of-the-art devices while consuming less electricity than similar transistors.

By improving the energy efficiency of electronic devices, this new approach could help reduce the burgeoning electricity consumption of computation, especially for demanding applications like generative AI, deep learning, and computer vision tasks.

“We have to minimize the amount of energy we use for AI and other data-centric computation in the future because it is simply not sustainable. We will need new technology like this integration platform to continue that progress,” says Yanjie Shao, an MIT postdoc and lead author of two papers on these new transistors.

The new technique is described in two papers (one invited) that were presented at the IEEE International Electron Devices Meeting. Shao is joined on the papers by senior authors Jesús del Alamo, the Donner Professor of Engineering in the MIT Department of Electrical Engineering and Computer Science (EECS); Dimitri Antoniadis, the Ray and Maria Stata Professor of Electrical Engineering and Computer Science at MIT; as well as others at MIT, the University of Waterloo, and Samsung Electronics.

Flipping the problem

Standard CMOS (complementary metal-oxide semiconductor) chips traditionally have a front end, where the active components like transistors and capacitors are fabricated, and a back end that includes wires called interconnects and other metal bonds that connect components of the chip.

But some energy is lost when data travel between these bonds, and slight misalignments can hamper performance. Stacking active components would reduce the distance data must travel and improve a chip’s energy efficiency.

Typically, it is difficult to stack silicon transistors on a CMOS chip because the high temperature required to fabricate additional devices on the front end would destroy the existing transistors underneath.

The MIT researchers turned this problem on its head, developing an integration technique to stack active components on the back end of the chip instead.

“If we can use this back-end platform to put in additional active layers of transistors, not just interconnects, that would make the integration density of the chip much higher and improve its energy efficiency,” Shao explains.

The researchers accomplished this using a new material, amorphous indium oxide, as the active channel layer of their back-end transistor. The active channel layer is where the transistor’s essential functions take place.

Due to the unique properties of indium oxide, they can “grow” an extremely thin layer of this material at a temperature of only about 150 degrees Celsius on the back end of an existing circuit without damaging the device on the front end.

Perfecting the process

They carefully optimized the fabrication process, which minimizes the number of defects in a layer of indium oxide material that is only about 2 nanometers thick.

A few defects, known as oxygen vacancies, are necessary for the transistor to switch on, but with too many defects it won’t work properly. This optimized fabrication process allows the researchers to produce an extremely tiny transistor that operates rapidly and cleanly, eliminating much of the additional energy required to switch a transistor between off and on.

Building on this approach, they also fabricated back-end transistors with integrated memory that are only about 20 nanometers in size. To do this, they added a layer of material called ferroelectric hafnium-zirconium-oxide as the memory component.

These compact memory transistors demonstrated switching speeds of only 10 nanoseconds, hitting the limit of the team’s measurement instruments. This switching also requires much lower voltage than similar devices, reducing electricity consumption.

And because the memory transistors are so tiny, the researchers can use them as a platform to study the fundamental physics of individual units of ferroelectric hafnium-zirconium-oxide.

“If we can better understand the physics, we can use this material for many new applications. The energy it uses is very minimal, and it gives us a lot of flexibility in how we can design devices. It really could open up many new avenues for the future,” Shao says.

The researchers also worked with a team at the University of Waterloo to develop a model of the performance of the back-end transistors, which is an important step before the devices can be integrated into larger circuits and electronic systems.

In the future, they want to build upon these demonstrations by integrating back-end memory transistors onto a single circuit. They also want to enhance the performance of the transistors and study how to more finely control the properties of ferroelectric hafnium-zirconium-oxide.

“Now, we can build a platform of versatile electronics on the back end of a chip that enable us to achieve high energy efficiency and many different functionalities in very small devices. We have a good device architecture and material to work with, but we need to keep innovating to uncover the ultimate performance limits,” Shao says.

This work is supported, in part, by Semiconductor Research Corporation (SRC) and Intel. Fabrication was carried out at the MIT Microsystems Technology Laboratories and MIT.nano facilities.