Nvidia is officially bringing its CUDA software stack to RISC-V CPUs.
CUDA is Nvidia’s high-level software abstraction layer for apps to interact with its GPUs – without CUDA support on a CPU architecture, GPU functionality is limited at best. The AI arms dealer announced RISC-V support on stage during the RISC-V Summit in China on Friday, and will eventually enable processors based on the open instruction set architecture (ISA) to serve as a host CPU for Nvidia GPUs.
Interest in RISC-V as an alternative to Arm and x86-based cores has gained momentum in recent years. However, high-performance RISC-V processors appropriate for the datacenter remain few and far between.
In this respect, Nvidia’s decision to announce CUDA support for the ISA in China is fitting. Over the past few years, the Middle Kingdom has made a concerted effort to end its reliance on Western CPUs, with RISC-V playing a central role.
Back in March, Alibaba’s R&D wing XuanTie unveiled a new CPU core called the C930 aimed at server, PC, and automotive applications. Meanwhile, the Xiangshan project teased a high-performance RISC-V processor core, which it claims is within spitting distance of Arm’s two-year-old Neoverse N2 cores.
If and when we can expect to see an Nvidia GPU strapped to any of these chips remains to be seen, but at least now it’s a possibility, especially now that Nvidia has convinced Uncle Sam to resume shipments of its China-spec H20 accelerators to China.
Nvidia’s decision to extend support for CUDA to the RISC-V instruction set isn’t all that surprising. It’s not the first or even second time its devs have worked with RISC-based systems. Today, CUDA runs on both x86 and Arm64-based processors, with Nvidia’s in-house Grace CPUs being the most notable.
Prior to Arm, CUDA was also supported on IBM Power-based systems. You may recall that the Department of Energy’s Sierra and Summit supercomputers paired Power9 processors with V100 GPUs.
Nvidia has also employed RISC-V cores in its GPUs for years now. In 2024 alone, RISC-V International estimates that Nvidia shipped more than a billion RISC-V cores, with anywhere from 10 to 40 baked into every GPU sold.
As you might expect, these cores are built into the microcontrollers responsible for low-level functionality like video codecs, chip-to-chip interconnects, power management, and security, rather than orchestrating GPU workloads.
How Nvidia intends to support development on RISC-V based systems remains to be seen. One possibility is a RISC-V single board computer (SBC) melding RISC-V cores with an Nvidia GPU. It currently offers several Arm-based SBCs in this vein. Nvidia could also partner with RISC-V-based chip or server vendors to build reference designs similar to its tie up with Ampere back in 2019.
The Register reached out to Nvidia for comment; we’ll let you know if we hear anything back. ®