MIT’s FUTUR-IC creates new way to package photonic chips with electronics

04 Aug 2025

Aim is to solve problems associated with limitations of current co-packaging process.

The future of digital computing and communications will involve both electronics and photonics. Together the two processes could allow exponentially more data traffic across the globe in a process that is also more energy efficient.

“The bottom line is that integrating photonics with electronics in the same package is the transistor for the 21st century. If we cannot figure out how to do that, then we will be able to scale forward,” said Lionel Kimerling, the Thomas Lord Professor of Materials Science and Engineering at MIT and director of the MIT Microphotonics Center.

Enter FUTUR-IC, a new research team based at MIT and funded by the National Science Foundation’s Convergence Accelerator through a cooperative agreement. “Our goal is to build a microchip industry value chain that is resource-efficient,” said Anu Agarwal, head of FUTUR-IC and a principal research scientist at the Materials Research Laboratory.

Now, FUTUR-IC researchers including Agarwal and Kimerling have developed a new way to co-package photonic chips with their electronic counterparts that solves several problems associated with the current co-packaging process. One advantage is that the newly developed co-packaged device can be manufactured using existing equipment in traditional electronics foundries with a less-expensive passive alignment process.

The device is described in a paper in Advanced Engineering Materials.

Resource-efficient

In 2020, the number of cell phones, GPS units, and other devices connected to the cloud, or large data centers, exceeded 50 billion, according to Kimerling. Furthermore, data-center traffic in turn is scaling by 1,000 times every 10 years. “This communication consumes energy and all of it has to happen at a constant cost of energy, because the gross domestic product isn’t changing at that rate,” said Kimerling, who is also affiliated with the MRL. The solution is to either produce more energy or make information technology more energy efficient, he added.

Integrating photonics with the electronics that underpin today’s microchips could address the latter because the transmission, or communication, of data using light is much more energy efficient. “Our mantra is to use electronics for computation and photonics for communication to bring this energy crisis under control,” said Agarwal.

However, this solution comes with its own challenges. For example, currently it is difficult and expensive to connect electronic chips with their photonic counterparts within a single package. That is because the optical fiber, which has a core diameter of 10 µm, and the photonic chip, which has cross-sectional dimensions of 0.2 µm x 0.5 µm, must be aligned almost perfectly or the light will disperse. So each connection must be actively tested with a laser to ensure that the light will pass through.

“The number of fibers that we will need for greater data communication is increasing exponentially, so this active alignment process won’t cut it for scaling forward,” Weninger said.

‘Wiggle room’

The new device, called an evanescent coupler, gives much more “wiggle room” (tolerance) for connecting the fibers within the electronic-photonic package. “Conventional couplers have a single coupling point, making alignment tolerances tight. But our new coupler has a much larger interaction length increasing the alignment tolerance,” said Agarwal. As a result, robots could passively assemble the resulting integrated circuits allowing more light to pass through without being lost.

There is a further innovation: the coupler “allows us to transmit light vertically” between the multiple layers of chips that comprise the whole, said Ranno. That in itself is an important feat because it is difficult to direct light out of a horizontal plane. Weninger explains: “In electronics it is very simple. Electrons can easily flow out of plane. In contrast, light never wants to take right angles.” The new coupler lets light make the jump between stacked chips.

Ranno concluded: “We have developed a packaging design for integrating photonics with electronics that is reliable, has a larger alignment tolerance, does not lose much light nor waste too much space. Basically, it has all the features you want for an efficient and functional interconnect.”

This work was carried out in part through the use of facilities at MIT.nano, and includes contributions from MIT’s Electronic-Photonic Packaging Consortium.

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