A new set of patches has hit the “coreboot” project, an open-source UEFI/BIOS alternative, adding another Intel “Panther Lake” stepping to our portfolio of leaks. This time, it is the PTL_B0_3 C06C3 stepping, a new version Intel could be preparing for shipment to clients. Silicon revisions typically begin at A0 and increment as the design evolves. It is rare to see any silicon shipping with the A0 stepping, as later modifications and refinements are made to meet the original specification. Hence, this B0 stepping indicates that this is likely the final revision Intel has prepared for Panther Lake, which is expected to start shipping by the end of 2025, with more SKUs in 2026.
As a reminder, the low-power PTL-U models are designed for a 15 W TDP and are expected to come in 6-core and 8-core versions. Some SKUs will feature four high-performance P-cores paired with four LPE-cores, while others will have only two LPE-cores complementing four P-cores. Both families will utilize Xe3-based integrated graphics, with entry models featuring four GPU cores. The more powerful PTL-H line will scale up to around 16 CPU cores, comprising four P-Cores, eight E-cores, and four LPE-cores. Some H-series parts might include up to 12 GPU Xe3 cores for integrated graphics, but the final configurations will be revealed when Intel officially launches the Panther Lake product family.