As advanced packaging pushes deeper into the sub-10µm realm, traditional inspection and metrology systems are being forced to evolve with it.
Hybrid bonding, a critical enabler of vertical integration and 3D system performance, relies on exceptionally tight alignment and defect-free bonding surfaces. But as interconnect pitch shrinks, even nanometer-scale variations in height, tilt, or contamination can cause partial or total bond failure. Ensuring high yield under these conditions requires improved or different metrology tools with the sensitivity to detect sub-nanometer anomalies and the speed to keep up with production demands.
Hybrid bonding involves direct dielectric-to-dielectric contact, combined with metal-to-metal bonding at copper pads. Unlike thermo-compression or solder-based interconnects, there’s no filler to absorb height variation or compensate for surface imperfections. This places increasing pressure on metrology and inspection systems to ensure wafers are perfectly flat, aligned, and clean before bonding.
“Customers are pushing for hybrid bonding down to 6µm, 5µm, and even smaller pitches,” said Damon Tsai, head of product marketing for inspection at Onto Innovation. “With those smaller bumps, your alignment has to be tighter, and the requirements for wafer flatness, CMP steps, and oxide cleaning become critical.”
As pitches decrease, bonding yields become increasingly sensitive to mechanical variation. Warpage, whether from thermal stress, uneven material layers, or post-deposition strain, can cause subtle tilt or bowing of the wafer. But even nanometer-level differences in height across the bonding interface can prevent contact between copper pads, leading to non-bonded zones or open circuits. These issues often go undetected by traditional inspection methods.
“You have to think about warpage and co-planarity and X/Y & Theta placement in terms of bond resistance,” said Jack Lewis, chief technologist at Modus Test. “We measure bond resistance with sub-milliohm accuracy, which indirectly tells us a lot about co-planarity, warpage, and alignment. If you map this across a package, you see exactly where these are affecting bond quality.”
Detecting these nanoscale differences isn’t just a question of optical resolution. It requires a system that can measure height, curvature, and tilt with atomic precision, often under cleanroom conditions and with minimal impact on manufacturing throughput. Bruker, for example, uses atomic force microscopy (AFM) to achieve sub-nanometer vertical resolution, which is essential for qualifying surface flatness and roughness on both bonded wafers. AFM provides sub-nanometer vertical resolution, while optical profilometry covers a much larger field with higher throughput speed. Hybrid metrology leverages both.
“With hybrid bonding, even a few nanometers of surface height variation can result in incomplete contact,” said Samuel Lesko, head of applications development at Bruker. “That’s why we’ve developed techniques like hybrid metrology, combining AFM with optical profilometry to provide both speed and precision.”
One of the more persistent obstacles is the non-uniform nature of warpage. It can vary across wafers, shift between zones, and change dynamically due to thermal or process fluctuations. Real-time detection under these conditions is especially difficult when throughput pressures are high.
“When the pitch shrinks from 12 microns down to 7, the challenge is to figure out how to increase the speed commensurately on our side,” said John Hoffman, director of product engineering at Nordson Test & Inspection. “We do this through faster cameras, with more pixels, and more advanced algorithms that require fewer pixels to achieve commensurate measurements.”
Even when warpage is well understood at the wafer level, die-level variation introduces another layer of complexity. Dies on the edge of the wafer may have different stress profiles than those at the center. If die-level metrology isn’t performed, failures may be missed entirely. This is where AI and machine learning are beginning to play a role, training models on massive datasets to predict likely failure zones and adapt inspection patterns accordingly.
“Metrology is the glue,” said Nick Keller, director of applications development at Onto Innovation. “It’s the thing that connects all these process steps, whether you’re talking about CMP, bonding, or cleaning. If something is wrong in the final stack, metrology is usually what tells you where it went wrong.”
Voids, contamination, and non-bonded zones
While co-planarity (flatness) and warpage are primary concerns, even perfectly aligned wafers can suffer from hybrid bond failures due to voids or surface contamination. As bonding transitions from micron- to nanometer-scale interconnects, the margin for error shrinks dramatically. A single contaminant particle or residual oxide layer can block contact between pads, creating open circuits or high-resistance joints that degrade system performance, or worse, go undetected until field failure.
Traditional inspection systems were never designed to catch such minute anomalies, especially across large volumes and dense interconnect fields. And while infrared imaging, scanning acoustic microscopy (SAM), and X-ray inspection are useful in other packaging contexts, they typically lack the resolution or contrast needed to detect nanoscale voids or incomplete metal-to-metal contact in fine-pitch hybrid bonds.
“In hybrid bonding, you’re not looking for big voids. You’re looking for nanometer-sized gaps where bonding didn’t happen, even though the surfaces looked clean,” said Onto’s Tsai. “To catch that, we need techniques that combine high sensitivity with extremely low signal noise.”
Surface cleanliness plays a particularly outsized role in hybrid bonding. Even trace residues from chemical mechanical planarization (CMP), wafer cleaning, or transport steps can prevent direct bonding between oxide surfaces or interfere with copper-to-copper connections. Standard cleaning processes must be refined for hybrid bonding, and inspection systems must be sensitive enough to validate whether those processes are working effectively.
“In a hybrid bond stack, if the dielectric isn’t smooth enough, you don’t get the right van der Waals forces to initiate bonding,” said Zsolt Tokei, fellow and program director for 3D system integration at imec. “First, the dielectric is bonded, and then the Cu pads upon anneal.”
Fig. 1: Example of a die-to-wafer hybrid bonding process. Source: imec
To address this, some fabs are experimenting with in-situ metrology systems that measure surface contamination just before the bond step, or with process control loops that use optical scatterometry or spectroscopic ellipsometry to qualify cleaning steps. These methods are still evolving and are often slow compared to production tool throughputs, but they are increasingly necessary to catch sub-surface issues that no post-bond inspection can resolve.
“You can’t wait for the signoff stage to find out there’s a thermal or EM issue. By then, it’s too late,” said Amlendu Choubey, senior director at Synopsys. “You need early-stage analysis tools that can work with limited data and still provide directionally accurate predictions. That lets you optimize for bonding success before you even have a full netlist.”
One promising direction is resistance mapping at the interconnect level, particularly when paired with custom test vehicles. By designing probe structures into the wafer, engineers can assess how many connections are conducting properly versus those that are either open or resistive due to contamination or non-uniform contact. This method, while often sample-based and offline, offers a statistically grounded way to calibrate non-destructive inspections.
“In our HBM development work, we use daisy chains to evaluate thousands of connections at once,” said Scott DeBoer, executive vice president and chief technology and products officer at Micron, during a presentation at ITF World. “We know what the expected resistance is across a known geometry, so when that shifts, we can identify voids or bond degradation even before visual inspection sees it.”
However, such approaches can be costly, and yield-focused fabs are often reluctant to sacrifice even a single wafer to destructive testing. This has driven demand for new high-throughput, non-contact methods, especially those that can offer both high sensitivity and data-rich outputs for process correlation.
Overlay and alignment at atomic scale
As hybrid bonding enters the sub-5µm environment, lateral alignment between wafers becomes as critical as overlay. At these dimensions, even a sub-100nm overlay error can result in misaligned copper pads or bond interfaces, dramatically reducing electrical continuity and reliability failures. The problem is compounded by the fact that wafers are not static objects. They breathe, bow, and shrink during processing.
Achieving sub-micron overlay in a real-world fab requires tight coordination between wafer handling, cleaning, bonding, and metrology steps. Slight differences in thermal expansion coefficients, local film stress, or even chuck pressure during processing can cause shifts in x, y, and theta. Existing optical alignment systems often struggle to maintain precision across an entire wafer, particularly at the die level.
Overlay errors aren’t just mechanical issues. They increase parasitic resistance and capacitance, which can degrade signal integrity in high-speed links like HBM and chiplet-to-chiplet interconnects. Even when a connection is physically made, misalignment can change the shape of the interconnect path, leading to unpredictable timing or electromigration behavior that must be modeled and validated.
“You can’t think of power, thermal, and signal effects in isolation anymore,” said Synopsys’ Choubey. “When you stack dies and bring high-speed signaling into the package, everything becomes interdependent. That’s why we’ve built multi-physics engines into our platform, to predict these interactions early and help designers avoid costly surprises later.”
Some tool vendors have responded by integrating metrology directly into wafer bonders, allowing for last-minute overlay checks and fine adjustments. Others are exploring alignment fiducials embedded into the wafer surface that can be read with greater accuracy than conventional optical targets. Still, these methods add complexity and may not scale well to full wafer stacks with multiple hybrid bonding layers.
“In advanced logic, or CMOS2.0 we’re now considering at triple or quadruple wafer stacks,” Tokei said. “And the overlay budget doesn’t grow, it shrinks. So, each bonding step has to be more precise than the last.”
The margin for cumulative overlay error across multiple bonded tiers is vanishingly small. To manage this, some fabs are incorporating AI-assisted alignment correction, which uses predictive models trained on historical bonding data to anticipate parametric drift or skew. These corrections can be applied dynamically in real time if the metrology and bonding systems are sufficiently integrated.
“You can’t think about bonding in isolation anymore,” said Michael Yu, vice president of advanced solutions at PDF Solutions. “Alignment, inspection, and bonding all have to feed each other with data. Otherwise, you’re flying blind.”
Evolving solutions – AI, profilometry, resistance mapping, and test vehicles
The shift to fine-pitch hybrid bonding is not only forcing changes in the types of defects engineers must catch, but also in how inspection data is generated, interpreted, and acted upon. As interconnects become denser and bonding windows narrower, no single metrology or inspection method is sufficient. Instead, manufacturers are combining multiple techniques, including optical, electrical, and mechanical along with AI and predictive analytics to stitch the results into actionable insights.
Optical profilometry, for example, remains a staple for non-contact topography measurement, especially for pre-bond surface qualification. Tools that can combine vertical height measurements with lateral scanning at nanometer-scale precision help detect subtle topographic defects, such as residues or oxide bumps that could interfere with dielectric bonding. But optical methods are inherently limited by their resolution and can struggle with buried interfaces or subsurface voids.
“We use both white-light and laser-based profilometry to get the full picture,” said Bruker’s Lesko. “But you have to understand the limitations. Optical inspection can miss certain defects, especially when they’re embedded or masked by surface features.”
This is where electrical testing and resistance mapping come into play. By embedding test structures, such as Kelvin lines, daisy chains, or loopbacks, into bonded wafers, engineers can electrically probe for opens, shorts, or elevated resistance at the interconnect level. These techniques not only validate contact integrity but also provide a statistical sampling of bond quality across the wafer.
“In our test vehicles, we can measure high resolution resistance on thousands of interconnects independently finding outliers traditional chained methods miss,” said Lewis. “That gives us a high-resolution maps of where bonding succeeded and where it failed or deviated from the norm, which we can then correlate with other inspection data types to improve inspection accuracy on those tools.”
Yet even these detailed resistance maps have limitations. They provide valuable insights into bond integrity, but they often are based on off-line sampling or dedicated test structures, providing only partial wafer coverage. As interconnect density increases and the cost of failure rises, engineers need a way to extrapolate those results across the entire wafer in real-time. This is where AI and machine learning are proving essential, not by replacing electrical or optical inspection, but by amplifying their value through intelligent pattern recognition and predictive analytics.
Onto Innovation and PDF Solutions are both leveraging AI to analyze massive metrology datasets and uncover patterns that rule-based systems often miss. These include subtle correlations between cleaning parameters and bonding failure rates, as well as spatial anomalies that may reflect tool drift or process variation.
“We’re training models not just to detect known defect types, but to flag anomalies that may signal emerging failure modes,” said Tsai. “It’s not just classification. It’s predictive.”
Michael Yu, vice president at PDF Solutions, described a similar trend in which fabs are adopting AI to improve sample efficiency. Instead of inspecting every die, risk-based models help determine which regions or wafers are most likely to harbor defects and focus inspection efforts accordingly. “That kind of adaptive sampling is key to scaling inspection at these pitches,” Yu said. “The data load is too high otherwise, and traditional sampling methods won’t catch rare or localized defects.”
All of this points toward a more integrated inspection ecosystem, one where data flows across tools, processes, and decision layers. The goal is not just to catch defects, but to understand their origin, predict recurrence, and adjust process parameters before yield is impacted.
Ironically, the challenge of increased density is also becoming part of the solution. With more interconnects per unit area, statistical analysis becomes more robust, giving metrology tools a clearer signal and more opportunities to catch failure modes.
“The advantage of fine-pitch hybrid bonding is that the measurement using scatterometry actually gets better,” said Keller. “When you have more bumps per unit area at a smaller diameter, the signal to noise ratio improves and measurement sensitivity improves, meaning better detection of Cu recess and faster yield learning.”
These insights reinforce a key theme in hybrid bonding metrology — success depends not only on detecting individual defects, but also on gathering enough high-quality data to understand patterns across the wafer and across process steps. As wafer-level bonding evolves, data density itself may prove to be the bridge between inspection and yield.
Remaining gaps, tradeoffs, and path to standardization
Despite the rapid evolution of hybrid bonding metrology, critical gaps remain. The need for higher resolution and faster throughput is constant, but adding new sensors, inline tools, or AI models is not without tradeoffs. Costs escalate quickly, and process control improvements must be weighed against their impact on cycle time, tool complexity, and return on investment.
“Fabs are under pressure to improve yield, but they’re also being asked to do more with fewer inspection steps,” said Nordson’s Hoffman. “That means you can’t afford false positives, but you also can’t afford to miss anything. It’s a tightrope.”
One persistent challenge is the lack of industry-wide benchmarks and standards for hybrid bonding inspection. Every fab defines its own overlay tolerances, surface planarity specs, and bonding void thresholds. Metrology tools often are customized for specific flows, and what constitutes a “defect” in one fab may be a process variation in another. This inconsistency makes it difficult to compare tool performance or share best practices across the ecosystem.
“The industry still lacks standard test structures or qualification protocols for hybrid bonding,” said Micron’s DeBoer. “We’re having to invent our own test vehicles just to understand how different tools respond to the same defect types.”
Without common reference points, it also becomes harder for equipment vendors to calibrate their systems for universal applicability. Companies like Bruker, Onto Innovation, and Synopsys each have developed internal validation schemes, but customers often must perform their own correlation studies, slowing adoption and increasing development costs.
Some progress is being made through consortia efforts and shared test platforms, such as those at imec. By bringing together diverse stakeholders to define bonding test protocols, overlay measurement benchmarks, and defect classification schemas, these initiatives aim to create the kind of common language that enabled the rise of advanced lithography or FEOL metrology decades ago.
Ultimately, success in hybrid bonding metrology may depend less on any one inspection technique than on the industry’s ability to integrate them into a unified view of process health. That will require not only better tools but better data flows, smarter analytics, and a commitment to transparency across suppliers and fabs alike.
“At imec, we’ve partitioned the key contributors to bonded overlay and showed how to measure bonding strength, recommended pad design rules and how to relate that back to yield,” Tokei said. “But that work needs to go industry-wide.”
Conclusion: No margin for error
Although hybrid bonding is treated as a frontier technology, the concept itself has been around for more than a decade. What’s changed recently is not the existence of the technique, but the maturity of the ecosystem around it. Better cleaning chemistries, tighter lithography, and advances in inline metrology have finally made it viable for high-volume manufacturing for 3D integration and advanced packaging, enabling higher bandwidth, lower power, and tighter form factors across applications from AI accelerators to high-bandwidth memory. But as interconnects shrink below 10µm, the room for mistakes disappears. Defects that once went unnoticed now undermine entire stacks. And inspection tools that once sufficed are now being pushed to their physical and computational limits.
The industry’s response has been multi-pronged. It includes more sensitive metrology, deeper integration between process steps, the utilization of AI for data correlation, and renewed interest in standardizing test structures and inspection protocols. Yet even with these tools, the success of hybrid bonding will depend on how well fabs can close the loop between detection, root cause analysis, and process control before small defects cascade into systemic yield loss.
Fine-pitch hybrid bonding is not just a manufacturing challenge. It is a metrology challenge, a data challenge, and ultimately a systems integration challenge. Solving it will require more than new equipment. It will demand collaboration across design, process, and inspection disciplines. As the pitch shrinks, the silos must, too.
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